Gang, There will be the usual (short?) conference call today. Day: Thursdays Date: May 16, 2002 Time: 3 PM to 5 PM Telephone Number Assigned: 617-258-7910 We have one important (and urgent) matter. Choosing Benchmarks for SciDAC Hardware Acceptance. Remaining May meetings Thursday May 23 3 PM to 5 PM Wednesday May 29 3 PM to 5 PM (IS THIS OK? Carleton has a conflict on May 30.) Carleton, Robert E and I will present our revisions on level 2 QDP at the next meeting May 23, although Carleton will have just returned the day before so the May 29 meeting will problably be the really serious attempt to get this document in to final shape. Agenda: 1.) Benchmarks for SciDAC Hardware Acceptance: These are need for the 4 year proposal to the DOE being prepared for the end of the month. The program committeed "meet" on last Monday. I made "Strawman" suggestion (see message below with some comments I added during the call). Bob M and I can summarize the call but generally the First part for the acceptance of the 1.5 Million prototype QCDOC was the major concern. Also Bob Sugar suggested we find a general mechism for testing as we move forward with QCDOC and clusters. I will forward some additional comments by Claudio Rebbi and Doug Toussaint. 2.) Loose ends on the QPM release version 1.0.0 3.) Bob M might bring us upto date on schedule for two node simulations of MILC code with Toussaint and Eric Gregery. Rich ============================================================================== Chaps, Here is my "Strawman" for Benchmarks for SciDAC Hardware Acceptance for discussion. It needs to be made more concise and precise. (I haven't put in performance #'s but one Acceptance Criterion already agreed on by the Executive Committee is at least 20% for pure C code and 60% for hand coded (level 3) on the Asqtad Dirac inverter. Thes percentages are relative to the QCDOC design sustained goal of 50% of peak for the PowerPC. Other platforms may have different goals for sustained, since $'s/Mflop is the ultimate arbiter of any configuration.) VALADATION OF THE MACHINE: First Prototype Hardware Tests by Oct 1, 2002: (date too agressive) - - ---------------------------------------------- The earliest possible test of critical kernels (e.g. the Dirac inverter) on prototype hardware. Scaling of Dirac Inverts for 2^4, 4^4, 8^4 sublattices per processor: * Clover Improved Wilson * Asqtad Stagger Fermions (Need Dirac op, Force term and Fat link.) * Domain Wall Fermions All test must use the QMP interface posted on http://www.lqcd.org. These tests should be made in both C (or C++) and hand coded (level 3) versions (See http://buphy.bu.edu/~brower/SciDAC/qcdapidoc.html for QCD API levels and design documents.) * In addition a full test of application code in C/QMP for Hybrid Monte Carlo code running under MILC, CPS and SZIN. Entire MILC suite. (Entire MILC on 100-200 system.) * Real Physics benchmarks here (LePage). VALADATION OF SOFTWARE: Second Hardware and Software Environment test by Oct 1, 2003: - - -------------------------------------------------------------- * Full test of application code on QDP (level 2 API) for Hybrid Monte Carlo code running under MILC, CPS and SZIN. Metrics for the Benchmarks should be % of design performance as well as $'s/Mflop. Feedback from users on easy of use and the capability of software environment for rapid development and experimentation with new algorithms should be a part of the assessment. Rich ------------------------------------------------------------------------------------- Comments: Rough Hardware dates: Multiple modes test can be done on 128 QCDOC by end of December 2002 Early 03 to build QCDOC prototyp. Later 03 begin larger BNL Later 04 large scale cluster. Need *Barrier before 1.5 $ Million Oct 1 *Barrier before 5 Teraflop QCDOC and 5 Teraflop Clusters