All, Tomorrow's call (as usual) Dates: Oct 24, 2002 Day: Thursday Time: 3 PM to 5 PM, EDT Telephone Number Assigned: 617-258-7910 AGENDA: 1.) Multiple messages in QMP 2.) Strawman: Hardware/Software Test schedule for Jan 1, 2003 --- Jan 1, 2004. (see attached) 3.) Optimization strategy for QDP++ Rich -- Prof. Richard C. Brower Physics Deparment --Boston University 590 Commonwealth Ave. Boston, MA 02215 Tele: 617 353 6052 (BU) 617 253 2599 (MIT) 617 497 8296 (HOME) Fax: 617 353 9393 Email: brower@bu.edu brower@lns.mit.edu ******************************************************************** Strawman 2003 SciDAC Software Test Schedule ------------------------------------------ Objective: ---------- It essential that we have schedule of tests to prove that we are making timely progress to develop high performance software to fully utilize the 2003 prototypes and to prove the viability of all platform for outside users. These test (aka benchmarks) will be a critical ingredient both interms of the decisions on future hardware procurement and the assessment of the success or failure of SciDAC software infrastructure. The goal is to have a uniform set of benchmark developed in Jan 1, 2003 to Jan 1, 2004 period running on ALL 3 development platforms: 1.5 Teraflops QCDOC at Columbia. P4 Myrinet/GigE cluster at JLab. P4 Myrinet cluster at FNAL. for Hybrid Monte Carlo with 4 Fermion actions F_1 = Wilson, F_2 = DW, F_3 = Staggered F_4 = Asqtad. with 4 Lattice size per processors: V_1 = 2^4 V_2 = 4^4 V_3 = 4^2 8^2 V_4 = 8^4 On the QCDOC this should be run in CPS, QDP++ and MILC using level 3 inverters and QMP. On both FNAL and JLAB clusters, QDP++ and MILC code should be run over QMP/GM with optimized inverters. All inverters should be optimized and performance rigorously compared between platforms and code bases. Apples to apples comparisions and competetion between platforms are essential. As a comparison some examples of pure C or QCP++ inverters with level 3 inverters should be run on all machines so that their usefulness as platforms for generic algorithm development can be understood. ---------------------------------------------------------------------- I know this implies in the end of 2003 that we have a 4 x 4 matrix of tests for HMC in 3 code sets and 3 machines. Is this too much? I think it is not. Afterall we are claiming that we can move applicatations easily from one platform to another. Moving this test suite can't be all that hard. ** ALL TESTS RESULTS SHOULD BE SENT TO BROWER WITH THE PERFORMANCE NUMBERS AND THE SOURCE CODE TO BE POSTED ON HIS WEBPAGE.** B. Mawhinney/R. Edwards/C. DeTar will be responsible for reporting benchmarks from Columbia/JLab/FNAL respectively. QCDpack test suite: ------------------ As the codes for the test suite matures, they should also be posted on qcd.org by D. Richards as a SciDAC's ``QCD linpack''with appropriate portable libraries to have apples to apples comparisions of generic code on other non-SciDAC platforms run by whoever chooses to do it. (Steve Gottlieb?) Afterall we are being asked how much better do we do with dedicated hardware and specially optimizated code relative to using general purpose US supercomputer centers. ============================================================================ SCHEDULE: (dates are deadlines for submitting benchmarks --------- to the Software Committee NOT the earliest time that the code is run!) QUESTION: When will QCDOCO hardware be ready for test code? -------- Fig 3 Gantt chart says construction of single daughter board by mid 12/02 construction of 128 prototyope machine during 10/02-6/03 construction of 1.5Tflop development machine during 11/02-7/03 By Nov 15, 2002: --------------- QCDOC Simulator: Wilson, DW and Staggered with level 3 code. *Compare level 3 and C inverters for naive staggered MILC code. Clusters at JLab/FNAL: Full MILC application code over QMP over MPI and GM at JLab & FNAL --- The MPI version or preferable the GM version should be used forthwith unless it is a significant performance hit. (If QMP is inefficient devise plan to fix it!) By Jan 1, 2003: --------------- QCDOC Simulator: (or on a single daughter board.) *Asqtad inverter with level 3 code. Clusters at JLab/FNAL: Wilson, DW, Staggered and Asqtad inverter By Feb 1, 2003 (before the All Hands meeting) -------------- QCDOC simulator: (or on a single daughter board.) *Asqtad HMC with QDP force term for MILC FNAL cluster: Pure C Asqtad HMC in MILC on P4 cluster using QMP of course. JLab cluster: Optimized level 3 Wilson and DW inverters (why not full HMC?) Full QDP++ serial application code examples By April 1, 2003 ---------------- QCDOC on a single daughter board. *Asqtad HMC with level 3 opt force term in MILC JLab Clusters and test on QCDOC simulator: Beta version of Parallel QDP++ By June 1, 2003 ---------------- 128 node QCDOC Prototype: Full HMC matrix of tests (e.g. all 4 action and 4 volumes runing both in CPS and one of the outside codes either MILC or JLab QDP++.) JLab and FNAL Clusters: Full matrix of tests (e.g. all 4 action and 4 volumes runing both in QDP++ and MILC on both FNAL and JLab clusters.) QCDOC/JLab/FNAL Test uniform set of I/O routines and Data File formats for all codes. gigE grid cluster: Full matrix of tests (e.g. all 4 action and 4 volumes runing both in QDP++ at JLab) By Sept 1, 2003 ---------------- QCDOC 1.5 Teraflops Full matrix of tests running on the 1.5 QCDOC Prototype: MILC and QCP++ and CPS code. Both JLab and FNAL clusters Same test suite except for CPS code ? (Why not a portable CPS code?) Interm report on Production runs on all 3 platforms for June to Sept period. This should include system and programming evironment as well. By Dec 31, 2003 ---------------- Model extrapolations on performance/system_reliability/user_convenience for the 2004-2006 time frame for each platform. Final Report on experience with production runs. Hardware and systems performance with respect to ``real world physics productivity''.